Mrs. IPSITA MOHANTY
| Electrical Engineering | |
| GUEST FACULTY | |
| EEM, CNT, CONTROL SYSTEM, AEC, DECy | |
| POWER SYSTEM | |
| MTECH | |
| 11 years | |
| 7539823791 | |
| ipumohanty27@gmail.com |
Guest Lecturer, Bhubanananda Orissa School of Engineering, Cuttack, 27.09.2012 to till date
| Subjects | Chapter |
| 1. Digital& Micro-processor | 1.Number system 2. Logic Gates 3. Combinational Logic Circuits |
| 2. AE&OPAMP | 1.PN Junction Diode 2.Semiconductor Devices 3.Transistor Devices &Opamp |
| 3. Control System | 1. Open loop & closed loop system 2. Block Diagram & signal flow Graph 3. Time Domain Analysis |
| Sl. no | Title | Download |
|---|---|---|
| 1 | 3RD ENVIRONMENTAL STUDIES (2024-2025) |  |
| 2 | 5TH LP DIGITAL ELECTRONICS AND MICROPROCESSOR (2024-2025) | |
| 3 | 6TH_SEM_A_CSE__21-22 | |
| 4 | DEC___MP_LP_Ipsita_Mohanty_5th-B_compressed__1_ | |
| 5 | even_sem_22-23_IPSITA_MOHANTY_compressed | |
| 6 | LP_Ipsita_Mohanty_dec_mp_5th-B_compressed | |
| Sl. no | Title | Download |
|---|---|---|
| 1 | control_system_sem-6th_IM | |
| 2 | Transistor_IM | |
| 3 | DEC___MP_LP_Ipsita_Mohanty_5th-B_compressed__1_ | |
| 4 | even_sem_22-23_IPSITA_MOHANTY_compressed | |
| 5 | LP_Ipsita_Mohanty_dec_mp_5th-B_compressed | |
| Sl. no | Title | Download |
|---|